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Jeff Welser Title: Update on the U.S. Semiconductor Industry's Nanoelectronics Research Initiative Abstract: In recent generations of CMOS technology, exponentially increasing power density is limiting our ability to reap the historical benefits of continued scaling. Recognizing this challenge, the Semiconductor Industry Association (SIA) chartered the Nanoelectronics Research Initiative (NRI), a joint industry-government program to fund university research managed through the Semiconductor Research Corporation (SRC). The NRI work is guided by five primary research vectors, focused on finding novel logic devices that operate using state variables other than the dissipative switching of electron charge as the basis of computation. NRI Mission: Demonstrate novel computing devices capable of replacing the CMOS FET as a logic switch in the 2020 timeframe. These devices should show significant advantage over ultimate FETs in power, performance, density, and/or cost to enable the semiconductor industry to extend the historical cost and performance trends for information technology. Since its inception, the NRI program has grown substantially, and now includes partnerships with both the NSF and the National Institute of Standards and Technology (NIST), in addition to expanded partnerships with several US state governments. This talk will give an update on the program's status, as well as giving highlights of the research now being conducted at over 30 universities across the U.S. Title: Nanotechnology: Societal Implications and Education Abstract: Title: Nanotechnology at NIST Abstract: Founded in 1901, the National Institute of Standards and Technology (NIST) is a non-regulatory federal agency within the U.S. Department of Commerce. NIST's mission is to promote U.S. innovation and industrial competitiveness by advancing measurement science, standards, and technology in ways that enhance economic security and improve our quality of life. Nanotechnology research is a key component in all the agency's investment priority areas, broadly supporting innovation in the development of the nation's technology infrastructure. Through a coordinated cross-laboratory effort, the Center for Nanoscale Science and Technology (CNST) and nine other major laboratories at NIST are conducting more than 150 nanotechnology-related research projects developing measurements, standards, and data crucial to industry's development of products for a nanotechnology market that could top $2.5 trillion within the next decade. The NIST laboratories also assist other federal agencies to exploit nanotechnology to further their missions in areas such as national security, food safety, and environmental protection. Established in May of 2007, the CNST is the newest component of NIST's nanotechnology program. The Center includes a Research Program and a national facility, the NanoFab. The Research Program develops innovative nanoscale measurement and fabrication capabilities, and is accessible via collaboration with CNST scientists. The NanoFab is a fee-based, shared use facility accessible to all through a simple application process, providing researchers rapid access to a comprehensive suite of state-of-the-art tools and processes for nanofabrication. 
Maw-Kuen Wu Title: The NSF Nanoscale Science and Engineering Centers: Toward a Decade of Research. Abstract: The second phase of Taiwan National Nanotechnology Program (2009-2014) was
approved by the National Science Council of Taiwan. The program encompasses six
main themes including advanced research, electronics & optoeletronics, energy &
environment, instrument development, nano-biotechnology, and traditional industry.
We will also continue to promote the key strategic projects which include EHS issue,
education program, nano standardization, nanomark, university-industry
partnerships, international collaboration.
Hiroshi Yamada Abstract: MEMS-LSI heterogeneous devices integration is implemented to realize the monolithic integrated SOC (System-on-Chip) by applying the advantages of compatible processes between MEMS and CMOS-LSI. However, it has been impossible to integrate them in the case that MEMS and LSI processes are incompatible. In such cases, SIP (System-in-Package) is employed to realize the MEMS-LSI integration. However, because the interposer substrate occupies a large area in SIP, high integration density comparable to that of SOC has not been achieved SIP. Toshiba is doing research on pseudo-SOC technology incorporating MEMS-LSI heterogeneous devices. This work is part of the Fine MEMS Project supported by the New Energy and Industrial Technology Development Organization (NEDO). The pseudo-SOC is designed to realize a single microchip with MEMS-LSI heterogeneous devices made by using individual processes, for epoxy resin, insulating layer and redistribution (global) layer, respectively. The MEMS-LSI heterogeneous devices are embedded in the epoxy resin to reconfigure the MEMS-LSI integration wafer. As the insulating layer and global layer are formed by semiconductor wafer process without interposer substrate, the pseudo-SOC enables integration density as identical to that of SOC. This paper presents and overview of MEMS-LSI heterogeneous integration technologies including the Fine MEMS Project, which is a national project of Japan. This paper also presents the pseudo-SOC that overcomes the limitation of system integration and provides the complementary advantages of SIP and SOC.
James Yardley Title: The NSF Nanoscale Science and Engineering Centers: Toward a Decade of Research. Abstract: The network of Nanoscale Science and Engineering Centers (or NSEC's) is approaching its 10th anniversary. I will explore just what NSEC's are, how they work, and the contribution of the NSEC network to the development and evolution of the Nanotechnology revolution. I will use examples from the Columbia Nanocenter to demonstrate the synergistic influence of center-based research on technological development. 
Naoki Yokoyama Title: Nanotechnology's Contribution to an Environment-Conscious Society- Nanotechnology Business Roadmaps Abstract: The ICT society of the 21st century is about to witness a new paradigm shift from a computer-centric world via a network-centric world to a human-centric world. This will be a world in which human security and safety are ensured and social activities are supported, meaning that a truly ubiquitous society will be achieved, while individuals are provided with anytime, anywhere access to desired information. To build this new ICT society merely by extending past technologies, however, would result in a considerable increase in the energy used by current ICT, threatening the global environment, thus posing a dilemma. In my presentation, I will introduce the latest version of NBCI's nanotechnology business roadmaps, which highlight potential areas improving environmental problems. Then, I will present some of the R&D activities carried out by Japanese companies related to the description in the roadmaps. Finally, I would like to summarize both Japanese activities in nanoelectronics and also potential uses of nanotechnology in combating environmental problems. | |||||||
